Abstract
With the rise in global data demands, energy efficiency in electronics has become a defining challenge for sustainable progress in AI, healthcare, IoT, and beyond. Today’s electronics, constrained by materials and architectures that separate computing and memory, are approaching their energy and latency limits for data-intensive applications. Emerging solutions such as neuro-inspired computing and 3D integration of logic and memory devices offer great promise; however, their realization requires innovations in materials, transport physics, device engineering, and semiconductor-compatible fabrication. In this talk, I will discuss how atomic-scale engineering and the integration of heterogeneous materials and devices can address these intertwined challenges. I will highlight two key examples from my work: (1) electro-thermal and interface engineering in chalcogenide heterostructures enabling low-power memory on both rigid and flexible platforms, and (2) exceptional surface transport in non-crystalline semimetal introducing a new paradigm in low-resistance electronics. The relatively low fabrication and processing temperatures of these materials and devices make them suitable for monolithic 3D-stacked nanoelectronics. I will conclude with my vision for advancing transformative materials and multifunctional nanodevices to drive the future of 3D-integrated, energy-efficient electronics.
Bio
Asir Khan is a postdoctoral researcher at UC Berkeley, working with Prof. Sayeef Salahuddin in the EECS department. Asir received his PhD (2023) and MS in Electrical Engineering from Stanford University, where he was advised by Prof. Eric Pop and awarded the Stanford Graduate Fellowship. Asir’s research focuses on advancing energy-efficient electronics through atomic-scale engineering of heterogeneous materials and nanodevices to address fundamental energy limits. His interdisciplinary contributions have been recognized with the IEEE-EDS PhD Fellowship, Materials Research Society (MRS) Gold Graduate Award, and AVS Russell & Sigurd Varian Award. He also received several best paper and presentation awards including at the 2022 IEEE Symposium on VLSI Technology and Circuits, MRS Fall meeting, and AVS Symposium. Asir has held research intern positions at TSMC and IBM TJ Watson and currently serves as a Fellow at the Stanford Emerging Technology Review.
